Hardware Reliability


 

Related Publications

  • Che-Lun Hsu, Shaofeng Guo, Yibo Lin, Xiaoqing Xu, Meng Li, Runsheng Wang, Ru Huang and David Z. Pan, "Layout-Dependent Aging Mitigation for Critical Path Timing", Asia and South Pacific Design Automation Conference (ASPDAC), Jeju Island, Korea, Jan. 22-25, 2018
  • Meng Li, Ye Wang and Michael Orshansky, "A Monte Carlo Simulation Flow for SEU Analysis of Sequential Circuits", IEEE/ACM Design Automation Conference (DAC), Austin, TX, Jun. 5-9, 2016
  • Meng Li, Yuan Yi, Derek Chiou and Michael Orshansky, "An End-to-End SEU Simulation Platform", SRC Techcon, Austin, Tx, Sept. 20-22, 2014
  • Meng Li, Runsheng Wang, Jibin Zou and Ru Huang, "Characterization of Random Telegraph Noise in Scaled High-k/Metal-Gate MOSFETs with SiO2/HfO2 Gate Dielectrics", ECS Transactions, vol. 52, issue 1, pp. 941-946, 2013
  • Pengpeng Ren, Changze Liu, Runsheng Wang, Meng Li, Yangyuan Wang and Ru Huang, "Impact of Cycle-to-Cycle Variation Effects on the Prediction of NBTI Degradation and the Resulted Dynamic Variations in high-k MOSFETs", International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA), Hsinchu, Taiwan, Apr. 22-24, 2013
  • Xiaobo Jiang, Meng Li, Runsheng Wang, Jiang Chen and Ru Huang, "Investigation on the Correlation Between Line-Edge-Roughness (LER) and Line-Width-Roughness (LWR) in Nanoscale CMOS Technology", International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Xian, Shanxi, Oct.29 - Nov. 1, 2012