Hardware Security

TimingSAT: Decamouflaging timing-based logic obfuscation
In order to counter advanced reverse engineering techniques, various integrated circuit (IC) camouflaging methods are proposed to …
李萌, Kaveh Shamsi, Yier Jin, David Z Pan
A Synergistic Framework for Hardware IP Privacy and Integrity Protection
Publised by Springer, UT Austin Margarida Jacome Outstanding Dis- sertation Prize, EDAA Outstanding Dissertation Award, ACM Student Research Competition Grand Final First Place
李萌, David Z. Pan
A Practical Split Manufacturing Framework for Trojan Prevention via Simultaneous Wire Lifting and Cell Insertion
The advancing of reverse engineering techniques has complicated the efforts in intellectual property protection. Proactive methods have …
李萌, Bei Yu, Yibo Lin, Xiaoqing Xu, Wuxi Li, David Z. Pan
A Practical Split Manufacturing Framework for Trojan Prevention via Simultaneous Wire Lifting and Cell Insertion
Neural network accelerator is a key enabler for the on-device AI inference, for which energy efficiency is an important metric. The …
李萌, Bei Yu, Yibo Lin, Xiaoqing Xu, Wuxi Li, David Z. Pan
Provably secure camouflaging strategy for IC protection
The advancing of reverse engineering techniques has complicated the efforts in intellectual property protection. Proactive methods have …
李萌, Kaveh Shamsi, Travis Meade, Zheng Zhao, Bei Yu, Yier Jin, David Z Pan
Provably secure camouflaging strategy for IC protection
The advancing of reverse engineering techniques has complicated the efforts in intellectual property protection. Proactive methods have …
李萌, Kaveh Shamsi, Travis Meade, Zheng Zhao, Bei Yu, Yier Jin, David Z Pan
Cross-level monte carlo framework for system vulnerability evaluation against fault attack
Fault attack becomes a serious threat to system security and requires to be evaluated in the design stage. Existing methods usually …
李萌, Liangzhen Lai, Vikas Chandra, David Z. Pan
AppSAT: Approximately Deobfuscating Integrated Circuits
In today’s diversified semiconductor supply-chain, protecting intellectual property (IP) and maintaining manufacturing integrity …
Kaveh Shamsi, 李萌, Travis Meade, Zheng Zhao, David Z Pan, Yier Jin
A monte carlo simulation flow for seu analysis of sequential circuits
An efficient methodology for soft error analysis of sequential circuits based on Monte Carlo sampling is proposed. It uses nested …
李萌, Ye Wang, Michael Orshansky
Practical public PUF enabled by solving max-flow problem on chip
The execution-simulation gap (ESG) is a fundamental property of public physical unclonable function (PPUF), which exploits the time gap …
李萌, Jin Miao, Kai Zhong, David Z Pan